Asynchronous On-Chip Networks and Fault-Tolerant Techniques

<p><strong>Asynchronous On-Chip Networks and Fault-Tolerant Techniques</strong> is the first comprehensive study of fault-tolerance and fault-caused deadlock effects in asynchronous on-chip networks aiming to overcome these drawbacks and ensure greater reliability of applications.</p><p>As a promising alternative to the widely used synchronous on-chip networks for multicore processors asynchronous on-chip networks can be vulnerable to faults even if they can deliver the same performance with much lower energy and area compared with their synchronous counterparts – faults can not only corrupt data transmission but also cause a unique type of deadlock. By adopting a new redundant code along with a dynamic fault detection and recovery scheme the authors demonstrate that asynchronous on-chip networks can be efficiently hardened to tolerate both transient and permanent faults and overcome fault-caused deadlocks.</p><p>This book will serve as an essential guide for researchers and students studying interconnection networks fault-tolerant computing asynchronous system design circuit design and on-chip networking as well as for professionals interested in designing fault-tolerant and high-throughput asynchronous circuits.</p>