Basics VHDL Lab

VHDL is a description language for digital electronic circuits that is used in die rent levels of abstraction.The VHDL acronym stands for VHSIC (Very High-Speed Integrated Circuits) Hardware Description Language. This means that VHDL can be used to accelerate the design process. It is very important to point out that VHDL is NOT a programming language. Therefore knowing its syntax does not necessarily mean being able to designing digital circuits with it. VHDL is an HDL (Hardware Description Language) which allows describing both asynchronous and synchronous circuits.For this purpose we need to read this book through which VHDL is learned and programmed.This book is useful for those who want to start working in VHDL and learn it.