Gate Stacks with High-k Dielectrics and Metal Electrodes

Continuing to scale down the transistor size makesthe adoption of high-k gate dielectrics and metalelectrodes necessary. However there are still a lotof problems with high-k transistors such asFermi-level pinning (FLP) which affects flatbandvoltage ?Vfb?and threshold voltages (Vth) directly.This book summarizes three FLP mechanisms in gatestacks with high-k dielectrics and metal electrodes?a dipole formation through (1) the mechanism ofoxygen vacancy formation in a high-k dielectriclayer; (2) the hybridization between a metal gate anda high-k dielectric layer; and (3) the interactionbetween an interfacial SiO2 layer and a high-kdielectric layer. This book focuses on the study ofFLP and dipoles induced by capping a thin lanthanideoxide layer on a gate stack with a Hf-based high-kdielectric. By examining Vfb shifts in speciallydesigned gate stacks it is concluded that thenegative Vfb shift is due to a dipole formation atthe interface between the interfacial SiO2 layer anda lanthanide silicate layer. The Vfb shifts by othertwo FLP mechanisms are also studied. The book is veryuseful for those who are interested in FLP and Vthtuning in high-k transistors.