Simulation Studies on 3 phase Trinary Nine level Inverter with FATC

To obtain a large number of output voltage levels with minimum switches it presents a cascaded H-bridge multilevel inverter employing trinary D.C sources. Benefiting from the trinary topology of the inverter nine level can be synthesized with the fewest components. Particularly a nine-level inverter is an optimization in the number of levels for a given number of power transistors in power converters. The main disadvantage of the conventional topology is the large number of power supplies and semiconductors required to obtain these multistep voltage waveforms. The proposed topology significantly reduces the number of IGBT’s and their gate driver circuit as the number of output level increases. The proposed inverter can synthesize high quality output voltage near to sinusoidal waves. The circuit configuration is simple and easy to control. In this book three phase Trinary source nine level inverter based Bipolar Variable Amplitude SPWM techniques were presented evaluated and analyzed. The ojective of this book is to reduce the switching stress and to obtain the output voltage with multiple steps to achieve the lowest THD and improved fundamental VRMS.