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About The Book
Description
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This text explores VLSI fault modelling and testing techniques and covers such topics as: physical fault modelling and simulation for VSLI MOS circuits; designing CMOS gates to test open faults; testing bridging faults in VLSI; and testable design synthesis models.
Piracy-free
Assured Quality
Secure Transactions
*COD & Shipping Charges may apply on certain items.
Review final details at checkout.
₹5448
₹6375
14% OFF
Hardback
Out Of Stock
All inclusive*
Details
ISBN 13
9780893917814
Publication Date
-01-01-1993
Pages
-208
Weight
-327 grams
Dimensions
-140x216x15.88 mm
